Glossary

AEC

Active electrical cable: a copper cable with a retimer chip in each end, used for short links inside a rack instead of optics.

CMIS

Common Management Interface Specification: the software interface a switch uses to read and control OSFP and QSFP-DD modules. Whether USFP uses it hasn't been published.

Co-packaged optics (CPO)

Optical engines built into the switch chip's package, so light leaves the chip almost directly. Lowest power per bit; not replaceable from the front.

DAC

Direct attach copper: a passive copper cable with module-shaped ends, for the shortest links.

DSP

Digital signal processor: the chip in most pluggables that cleans up the electrical signal from the switch before it's turned into light. It costs power, which is why linear designs drop it.

Fat tree

A three-tier switch fabric (edge, aggregation, core) where every layer has the same total bandwidth, so any endpoint can talk to any other at full speed.

Full duplex

A lane that sends and receives at the same time. A "6.4T" module moves 6.4 Tb/s each way.

Lane

One electrical signal path between the switch chip and the module, each way. Port speed is lanes times lane rate: 8 lanes of 200G is a 1.6T port.

Leaf and spine

A two-tier fabric: endpoints connect to leaf switches, and every leaf connects to every spine.

LPO

Linear pluggable optics: modules without a DSP, relying on the switch's SerDes to drive the optics directly. Lower power and latency, tighter limits on reach.

MSA

Multi-source agreement: a group of companies that publish a module specification so several suppliers can build interchangeable parts. OSFP, XPO and Open CPX each have one; USFP's is planned.

NPO

Near-package optics: optical engines in sockets on the board right beside the switch chip. Open CPX standardizes one such socket.

OSFP

Octal Small Form Factor Pluggable: the eight-lane module behind most 800G and 1.6T AI networks today.

PAM4

Four-level pulse amplitude modulation: sending two bits per symbol by using four signal levels. Today's 100G and 200G lanes use it.

Radix

The number of ports on a switch at a given speed. A bigger radix lets a fabric connect more endpoints in fewer tiers.

Scale-out

The network that connects many servers or racks of GPUs together, usually Ethernet or InfiniBand, as opposed to the scale-up links inside one system.

SerDes

Serializer/deserializer: the circuits on a chip that send and receive fast serial data over a lane. Their speed (200G now, 400G next) sets the lane rate.

SuperNIC

NVIDIA's name for its high-end network cards for AI clusters. Cisco and NVIDIA plan USFP for SuperNICs as well as switches.

USFP

Ultra-Dense Small Form Factor Pluggable: Cisco and NVIDIA's proposed module for 400G lanes, 16 lanes (6.4T) at first and 32 (12.8T) later.

XPO

The Arista-led liquid-cooled pluggable: 64 channels, 12.8T per module, a cold plate built in.

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